This application claims priority from Italian Application MI91A003121, filed Nov. 22, 1991, which is hereby incorporated by reference.
The present invention relates to a method of forming high-stability metallic contacts in an integrated circuit with one or more metallized layers, of the type including the preliminary step of providing a plurality contact holes in a layer of dielectric material, the holes having opposite ends which open substantially flush with the layer and in an intermediate region of the circuit, respectively.
More particularly, the present invention relates to a method of producing very stable and reliable metal contacts of micrometric or submicrometric dimensions in integrated circuits with high or very high levels of integration.
As is known, the structure of an integrated circuit comprises a plurality of active and passive circuit components and metallic interconnecting layers which are insulated from each other by layers of dielectric material.
Apertures or holes formed in the dielectric layers enable the various components and the various interconnecting layers to be connected to each other.
The holes are known as xe2x80x9ccontactsxe2x80x9d when they enable connections to be formed between metallic interconnections and circuit components or as xe2x80x9cviasxe2x80x9d when they connect several interconnecting layers.
In the field of integrated circuits, the aim is always to increase the so-called xe2x80x9cscale of integrationxe2x80x9d, that is, to form circuit components of ever smaller dimensions.
However, vertical scaling is limited because the thicknesses of the layers of dielectric material cannot fall below a minimum value without causing an increase in the parasitic capacitances between the interconnecting layers, and hence a decline in the signal-processing speed of the circuit.
If the dimensions of the contacts, meaning the widths of the holes formed in the layers of dielectric material, are reduced, there is consequently no corresponding proportional reduction in their thicknesses.
The metal contacts of very large-scale integration (VLSI) circuits are therefore distinguished by a depth/aperture ratio greater than unity.
Because of this structural characteristic of VLSI integrated circuits, the deposition, normally by the so-called xe2x80x9csputteringxe2x80x9d technique, of a uniform layer of conductive metal, for example, aluminium, on the internal walls of the holes formed in the dielectric is extremely difficult.
More particularly, the layer of aluminium deposited becomes very thin at the edges between the bottoms and the side walls of the holes, causing serious problems as regards the reliability of the circuit in operation, due to the so-called electromigration phenomenon.
In order to ensure that the thickness of the conductive layer within the contact is sufficiently uniform, the use of so-called xe2x80x9cplanarizingxe2x80x9d deposition methods, that is methods which can form a layer of conductive metal such as to cover all the steps present in the surface of the circuit, has been proposed.
A first technique for depositing these layers, which are known as xe2x80x9cplanarized metallizationsxe2x80x9d, involves the deposition of aluminium by sputtering at a temperature above 400xc2x0 C. and at a slow deposition rate.
Under these conditions, the aluminium is brought to an almost fluid state and fills the holes and planarizes all the steps present in the surface of the circuit which has a substantially flat surface upon completion of the deposition.
However, this technique has a series of disadvantages which are not easy to eliminate, the main disadvantage being the fact that, at the sputtering temperature, the aluminium tends to react chemically with the silicon of the junctions in the bases of the contact holes, dissolving it and creating metallic protuberances within the silicon, which are known in the field by the term xe2x80x9cspikesxe2x80x9d and which tend to short-circuit the junctions.
In the case of circuits with several metallized layers, the problem is further aggravated because of the repeated heating cycles which are carried out during the deposition of the various layers of aluminium.
In the case of circuits with several metallized layers, it has therefore been proposed to replace the aluminium with tungsten in the first metallized layer.
This is deposited by chemical vapour deposition (CVD).
Although this technique enables optimal coverage of the steps, it cannot be applied to circuits with only one metallized layer because of the high resistivity of tungsten and, precisely because of this high resistivity, generally involves serious limitations on signal-processing speeds, even for circuits with several metallized layers.
As a result, the problem of obtaining a good electrical performance, meaning the ratio between the number of circuits which operate correctly from an electrical point of view and the total number or circuits produced, and, in particular, of obtaining acceptable reliability values from integrated circuits with very large-scale integration has not hitherto been resolved in a completely satisfactory manner.
The technical problem upon which the present invention is based is therefore that of providing a method which enables high-stability metallic contacts to be formed in an integrated circuit with one or more metallized layers, and which does not have the disadvantages complained of with reference to the prior art mentioned.
According to the invention, this problem is solved by a method of the type indicated above which is characterised in that it includes the steps of:
a) forming a first layer of tungsten on the substrate of dielectric material by chemical vapour deposition so as to cover the bases and the walls of the contact holes uniformly,
b) forming a second layer of aluminium or an alloy thereof by xe2x80x9csputteringxe2x80x9d deposition on top of the first layer of tungsten so as to fill the holes, and
c) forming a plurality of metallic interconnections of predetermined geometry by the selective removal of predetermined areas of the superposed aluminium and tungsten layers.